CORDIS Project
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This project develops the Load Slice Core microarchitecture, a new type of processor core designed to enhance memory hierarchy parallelism. It aims to improve performance and efficiency in multi-core processors, addressing challenges in both hardware and software for future computing needs.
The ideal processor building block is a power and cost-efficient core that can maximize the extraction of memory hierarchy parallelism, a combination that neither traditional in-order nor out-of-order cores provide.
We propose the Load Slice Core microarchitecture, a restricted out-of-order engine aimed squarely at extracting memory hierarchy parallelism, which, according to preliminary results, delivers a nearly 8 times higher performance per Watt per euro compared to an out-of-order core.
The…
UNIVERSITEIT GENT
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